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TFA9800J
2 x 7 W stereo power amplifier
Rev. 01 -- 17 March 2006 Preliminary data sheet
1. General description
The TFA9800 is an integrated class-AB dual output amplifier in a 9-pin DIL-bent-SIL (DBS9P) power package. The device is primarily developed for CRT and multi-media applications.
2. Features
s s s s s s s s s s Requires very few external components High output power Fixed gain Good ripple rejection Mute/standby switch AC and DC short-circuit safe to ground and VP Thermally protected Capability to handle high energy on outputs (VP = 0 V) No switch-on/switch-off plop Electrostatic discharge protection
3. Quick reference data
Table 1: VP IORM Iq(tot) Istb |Zi| Po SVRR cs Quick reference data Conditions operating no output signal repetitive peak output current total quiescent current standby current input impedance output power RL = 4 ; THD = 0.5 % RL = 4 ; THD = 10 % supply voltage rejection ratio on; fi = 100 Hz to 10 kHz channel separation RS = 10 k
[2] [2] [1] [1]
Symbol Parameter supply voltage
Min 6.0 50 4.5 6.0 48 40
Typ 15.0 40 60 5.5 7.0 -
Max 18.0 20.0 2.5 80 100 75 -
Unit V V A mA A k W W dB dB
Philips Semiconductors
TFA9800J
2 x 7 W stereo power amplifier
Quick reference data ...continued Conditions closed loop on; RS = 0 ; fi = 20 Hz to 20 kHz Min 19 Typ 20 50 Max 21 150 Unit dB V C voltage gain
Table 1: Gv
Symbol Parameter Vn(o)(rms) noise output voltage (RMS value) Tj
[1] [2]
junction temperature
The circuit is DC adjusted at VP = 6 V to 18 V and AC operating at VP = 8.5 V to 18 V. Output power is measured directly at the output pins of the TFA9800J.
4. Ordering information
Table 2: Ordering information Package Name TFA9800J DBS9P Description Version plastic DIL-bent-SIL power package; 9 leads (lead SOT523-1 length 12/11 mm); exposed die pad Type number
TFA9800J_1
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Preliminary data sheet
Rev. 01 -- 17 March 2006
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Philips Semiconductors
TFA9800J
2 x 7 W stereo power amplifier
5. Block diagram
non-inverting input 1
1
60 k
mute switch
Cm
4 VA
2 k
output 1
power stage
18 k
VP 8 mute/stand-by switch input
stand-by switch stand-by reference voltage
15 k
VA
x1 supply voltage ripple rejection output 3
15 k
mute switch mute reference voltage
18 k
TFA9800J
2 k
non-inverting input 2
9
60 k
VA
Cm
6
output 2
mute switch input reference voltage 2 SGND 7 VP
power stage
signal ground
power ground 5 (substrate) PGND
001aad578
Fig 1. Block diagram
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Preliminary data sheet
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Philips Semiconductors
TFA9800J
2 x 7 W stereo power amplifier
6. Pinning information
6.1 Pinning
-INV1 SGND SVRR OUT1 PGND OUT2 VP M/SS -INV2
1 2 3 4 5 6 7 8 9
001aad579
TFA9800J
Fig 2. Pin configuration SOT523-1
6.2 Pin description
Table 3: Symbol -INV1 SGND SVRR OUT1 PGND OUT2 VP M/SS -INV2 Pin description Pin 1 2 3 4 5 6 7 8 9 Description non-inverting input 1 signal ground supply voltage ripple rejection output output 1 power ground output 2 supply voltage mute/standby switch input non-inverting input 2
7. Functional description
The TFA9800J contains two identical amplifiers with differential input stages. The gain of each amplifier is fixed at 20 dB. A special feature of the device is the mute/standby switch which has the following features:
* Low standby current (< 100 A) * Low mute/standby switching current (low cost supply switch) * Mute condition
TFA9800J_1
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Preliminary data sheet
Rev. 01 -- 17 March 2006
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TFA9800J
2 x 7 W stereo power amplifier
8. Limiting values
Table 4: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VP VP(sc) VP(r) Ehand(O) IOSM IORM Ptot Tstg Tamb Tj
[1]
Parameter supply voltage short-circuit supply voltage reverse supply voltage energy handling capacity at outputs non-repetitive peak output current repetitive peak output current total power dissipation storage temperature ambient temperature junction temperature
Conditions operating no output signal
[1] [1]
Min 6.0 -
Max 15.0 18 6 200 4 2.5 25 +150 +85 150
Unit 18.0 20.0 V V mJ A A W C C C
VP = 0 V
-55 -40 -
The circuit is DC adjusted at VP = 6 V to 18 V and AC operating at VP = 8.5 V to 18 V.
9. Thermal characteristics
Table 5: Symbol Rth( j-c) Rth( j-a) Thermal characteristics Parameter thermal resistance from junction to case thermal resistance from junction to ambient in free air Conditions Typ 4 40 Unit K/W K/W
10. Static characteristics
Table 6: Symbol Supply VP Iq(tot) Istb VO II(sw) supply voltage total quiescent current standby current output voltage switch input current
[1]
Static characteristics Parameter Conditions Min 6.0 Typ 15 40 7.2 12 Max 18.0 80 100 40 Unit V mA A V A
Mute/standby switch
TFA9800J_1
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Preliminary data sheet
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TFA9800J
2 x 7 W stereo power amplifier
Static characteristics ...continued Parameter on threshold voltage mute threshold voltage standby threshold voltage Conditions Min 8.5 3.3 0 Typ Max 6.4 2 Unit V V V
Table 6: Symbol Vth(on) Vth(mute) Vth(stb)
[1]
The circuit is DC adjusted at VP = 6 V to 18 V and AC operating at VP = 8.5 V to 18 V.
11. Dynamic characteristics
Table 7: Dynamic characteristics VP = 15 V; RL = 4 ; f = 1 kHz; Tamb = 25 C; measured in Figure 3; unless otherwise specified. Symbol Po THD f-3db(l) f-1db(h) Gv |Gv| SVRR Parameter output power total harmonic distortion low frequency -3 dB point high frequency -1 dB point voltage gain voltage gain difference supply voltage rejection ratio fi = 100 Hz to 10 kHz on mute standby |Zi| Vn(o)(rms) input impedance noise output voltage (RMS value) fi = 20 Hz to 20 kHz on; RS = 0 on; RS = 10 k mute VO(mute) cs
[1] [2] [3] [4] [5]
[4] [4] [5] [3] [3] [3]
Conditions RL = 4 ; THD = 0.5 % RL = 4 ; THD = 10 % Po = 1 W
[2] [1] [1]
Min 4.5 6.0 20
Typ 5.5 7.0 0.1 45 20 0.1
Max 21 1
Unit W W % Hz kHz dB dB
closed loop
19 -
48 48 80 50 40
60 50 70 50 -
75 100 2 -
dB dB dB k V V V mV dB
mute output voltage channel separation
VI(max) = 1 V; fi = 20 Hz to 15 kHz RS = 10 k
Output power is measured directly at the output pins of the IC. Frequency response externally fixed. Ripple rejection measured at the output with a source impedance of 0 , maximum ripple amplitude of 2 V (p-p) and a frequency between 100 Hz and 10 kHz. Noise voltage measured in a bandwidth of 20 Hz to 20 kHz. Noise output voltage independent of RS (VI = 0 V).
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Preliminary data sheet
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2 x 7 W stereo power amplifier
12. Application information
12.1 Printed-Circuit Board (PCB) layout and grounding
For high system performance level, certain grounding techniques are imperative. The input reference grounds have to be tied with their respective source grounds and must have separate traces from the power ground traces; this will prevent the large (output) signal currents from interfering with the small AC input signals. The small-signal ground traces should be physically located as far as possible from the power ground traces. The width of supply and output traces should be as large as practical for delivering maximum output power. Proper supply bypassing is critical for low noise performance and high power supply rejection. The respective capacitor locations should be as close as possible to the device and grounded to the power ground. Proper power supply decoupling also prevents oscillations. For suppressing higher frequency transients (spikes) on the supply line a capacitor with low Equivalent Series Resistance (ESR), typical 0.1 F, has to be placed as close as possible to the device. For suppressing lower frequency noise and ripple signals, a large electrolytic capacitor, e.g. 1000 F or greater, must be placed close to the TFA9800J. In a single-ended (stereo) application a bypass capacitor on the SVRR pin reduces the noise and ripple on the mid-rail voltage. For good THD and noise performance a low ESR capacitor is recommended.
12.2 Input configuration
It should be noted that the DC level of the input pins is about 2.1 V, therefore a coupling capacitor is necessary. 1 1 The input cut-off frequency is: f i = ----------------- f i = ----------------------------------------------------------------- = 24 Hz 3 -9 2R i C i 2 x 30 x 10 x 220 x 10 This calculation shows that it is not necessary to use high capacitor values for the input; so the delay during switch-on, which is necessary for charging the input capacitors, can be minimized. This results in a good low frequency response and good switch-on behavior. For stereo application (single-ended) coupling capacitors on both input and output are necessary.
12.3 Built-in protection circuits
The TFA9800J contains two kinds of protection circuits:
* Short-circuit of outputs to ground, supply and across the load: short-circuit is detected
and controlled by a Safe Operating ARea (SOAR) protection circuit.
* Thermal shutdown protection: the junction temperature is measured by a temperature
sensor; at a junction temperature of > 150 C, thermal fold back is activated.
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Preliminary data sheet
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2 x 7 W stereo power amplifier
12.4 Output power
The output power versus supply voltage has been measured on the output pins and at THD = 10 %. The maximum output power is limited by the maximum allowable power dissipation and the maximum available output current: 2.5 A repetitive peak current; see Figure 13.
12.5 Supply voltage ripple rejection
The SVRR has been measured with an electrolytic capacitor of 100 F on pin 3 and at a bandwidth of 10 Hz to 80 kHz. Both curves for operating and mute condition were measured with RS = 25 ; see Figure 9.
12.6 Headroom
A typical music CD requires at least 12 dB (= factor 15.85) dynamic headroom compared with the average power output for passing the loudest portions without distortion. The following calculation can be made for this application at VP = 15 V and RL = 4 : Po at THD = 0.2 % is about 4.5 W; see Figure 7. Average Listening Level (ALL) without any distortion yields: Po = 4.5 W / 15.85 = 284 mW. From Figure 11, the power dissipation can be derived for a headroom of 0 dB and 12 dB respectively:
Table 8: Condition Po = 4.5 W at THD = 0.2 % Power rating Headroom 0 dB 12 dB Power dissipation 6W 4W
So for average listening level music power, a power dissipation of 4 W can be used for the thermal behavior calculation as described in Section 12.9 "Thermal behavior".
12.7 Pin M/SS
For the three functional modes: Standby mode, Mute mode, and Operating mode, pin M/SS can be driven by a 3-state logic output stage, e.g. microcontroller with some extra components for DC-level shifting; see Figure 10 for the respective DC levels.
* Standby mode is activated by a low DC level, between 0 V and 2 V on pin M/SS. The
power consumption of the TFA9800J will be reduced to < 0.1 mW
* Mute mode will be activated by a DC level between 3.3 V and 6.4 V. The outputs of
the amplifier will be muted (no audio output), however the amplifier is DC biased and the DC level of the output pins remains on half the supply voltage. The input coupling capacitors are charged when in Mute mode to avoid plop noise.
* The TFA9800J will be in Operating mode at pin M/SS voltages between 8.5 V and VP 12.8 Switch on and switch off
To avoid audible plops during switch on or switch off of the supply voltage, pin M/SS has to be set in Standby condition (GND level) before the voltage is applied (switch-on) or removed (switch-off). Via the Mute mode the input- and SVRR-capacitors are smoothly charged (or discharged). The slope of the SVRR-voltage should be well controlled and
TFA9800J_1
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Preliminary data sheet
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Philips Semiconductors
TFA9800J
2 x 7 W stereo power amplifier
slow. Unfortunately, the slope of the SVRR voltage is not well controlled in the phase where the SVRR voltage is between ground and ground + 0.7 V. In other words SVRR makes a step and so does the output. Consequently a plop sound can occur. Solution is to give the SVRR pin a bias, see anti plop 1 in Figure 4. A second improvement is to give the DC-outputs of the load a bias, see anti plop 2 Figure 4. The turn-on and turn-off time can be influenced by an RC-circuit on the pin M/SS; see anti plop 3 in Figure 4. Rapid on/off switching of the device or pin M/SS may cause click and plop noise. A proper timing on pin M/SS can prevent this; see Figure 4.
12.9 Thermal behavior
The typical thermal resistance of the TFA9800J in the DBS9P package (Rth(j-c)) is 4 K/W. The thermal resistance (Rth(h-a)) of an aluminium heat-sink with a (one-side) area of about 22 cm2 is about 16 K/W. For a maximum ambient temperature of 60 C the following calculation can be made for the application at VP = 15 V, RL = 4 and the ALL music power dissipation is about 4 W: T j ( max ) = T amb + P tot x ( R th ( j - c ) + R th ( h - a ) ) T j ( max ) = 60 + 4.0 x ( 4 + 16 ) = 140 C Remark: The calculation holds for applications at average listening level music output signals. Applying or testing with sine wave signals will produce about 1.5 x the music power dissipation. At worst-case condition this can activate the maximum temperature protection.
12.10 Application diagram and board layout
The single-ended application circuit diagram is shown in Figure 3. The PCB layout for this application is shown in Figure 5 and Figure 6.
VP
220 nF
IN1
-INV1 1
8
7 4 OUT1
100 nF
2200 F
TFA9800J
Vref
1000 F
3 SVRR
100 F
4
6 OUT2
220 nF
IN2
-INV2 9 SGND 2 PGND 5
1000 F
4
001aad580
Fig 3. Single-ended application block diagram
TFA9800J_1
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Preliminary data sheet
Rev. 01 -- 17 March 2006
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TFA9800J
2 x 7 W stereo power amplifier
1 M 1 k
22 k
mute
BC337 4.7 F 220 nF
VP M/SS -INV1 1 8 7 4 OUT1
1000 F 470
anti plop 3
VP
200 k BAW62
VP
22 k
SVRR
100 F
TFA9800J
3 Vref 6 OUT2
1000 F BAW62 470 47
200 k
anti plop 1
220 nF
-INV2 9 SGND 2 PGND 5 anti plop 2
GND
001aad581
Fig 4. Implementation diagram for plop improvement
001aae489
001aae490
a. Bottom side
b. Component side
Fig 5. Printed-circuit board copper plane layout for single-ended application
TFA9800J_1
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Preliminary data sheet
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TFA9800J
2 x 7 W stereo power amplifier
FP 26 AUG 2005 C16 IN1
C17 + 1 SVR C6 IN2 OUT2 + X10 X4 X1
TFA9800J ASYM C14 S1 C15 +
7322-448-16011
C18 +
C19 OUT1
X3 X5 X2 + OUT2- + OUT2- VP GND
1 2 1 2 1 2
001aae491
Fig 6. Printed-circuit board component layout for single-ended application
12.11 Typical performance characteristics for single-ended application
The test conditions, unless otherwise specified, are: Tamb = 25 C; VP = 15 V; fi = 1 kHz; RL = 4 ; single-ended stereo application; fixed gain equals 20 dB; audio band pass from 22 Hz to 22 kHz. All graphs show typical curves. The graphs as a function of frequency use a band pass of 20 Hz to 80 kHz.
10 THD (%) 1 VP = 9 V 12 V 15 V 18 V
001aae492
10 THD (%) 1
001aae493
VP = 9 V 12 V 15 V 18 V
10-1
10-1
10-2 10-2
10-1
1 Po (W)
10
10-2 10-2
10-1
1
10 f (kHz)
102
Fig 7. Total harmonic distortion as a function of output power
Fig 8. Total harmonic distortion as a function of frequency
TFA9800J_1
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Preliminary data sheet
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TFA9800J
2 x 7 W stereo power amplifier
0 SVRR (dB) -20 -40 -60 -80 -100 10-2
001aae494
10 Vo (V) 1 10-1 10-2 10-3 10-4
001aae495
operating
mute
10-1
1
10 f (kHz)
102
0
4
8
12 VM/SS (V)
16
RS = 25
Fig 9. Supply voltage ripple rejection as a function of frequency
10 Ptot (W) 8
001aae496
Fig 10. Output voltage as a function of voltage on pin M/SS
10 Ptot (W) 8
001aae497
RL = 4
6
RL = 4
6 RL = 8
4 RL = 8
4 RL = 16 2
2
0 0 2 4 6 Po (W) 8
0 8 12 16 VP (V) 20
Fig 11. Total power dissipation (worst case, both channels driven) as a function of output power per channel
001aae498
Fig 12. Total power dissipation (worst case, both channels driven) as a function of supply voltage
001aae499
12 Po (W) 8
0 cs (dB) -20 -40
RL = 4
RL = 8 4 RL = 16
-60 -80 -100 10-2
0 8 12 16 VP (V) 20
10-1
1
10 f (kHz)
102
RS = 25
Fig 13. Output power (one channel) as a function of supply voltage
Fig 14. Channel separation as a function of frequency
TFA9800J_1
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Preliminary data sheet
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TFA9800J
2 x 7 W stereo power amplifier
13. Package outline
DBS9P: plastic DIL-bent-SIL power package; 9 leads (lead length 12/11 mm); exposed die pad SOT523-1
non-concave x Eh
q1
Dh D D1 P k view B: mounting base side A2 q2
E
B
q
L2 L
L3
L1
1 Z e DIMENSIONS (mm are the original dimensions) UNIT A2(2) bp mm c D(1) D1(2) Dh E(1) Eh e e1
9 wM 0 5 scale e1 e2 k 3 2 L L1 L2 L3 4.5 3.7 m 2.8 P Q q q1 q2 v w x Z(1) 1.65 1.10 10 mm Q m e2 c vM
bp
2.7 0.80 0.58 13.2 2.3 0.65 0.48 12.8
6.2 14.7 3.5 2.54 1.27 5.08 3.5 5.8 14.3
12.4 11.4 6.7 11.0 10.0 5.5
3.4 1.15 17.5 4.85 3.8 3.1 0.85 16.3 3.6
0.8 0.3 0.02
Notes 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 2. Plastic surface within circle area D1 may protrude 0.04 mm maximum. OUTLINE VERSION SOT523-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 00-07-03 03-03-12
Fig 15. Package outline SOT523-1 (DBS9P)
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Preliminary data sheet
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TFA9800J
2 x 7 W stereo power amplifier
14. Soldering
14.1 Introduction to soldering through-hole mount packages
This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board.
14.2 Soldering by dipping or by solder wave
Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.
14.3 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 C and 400 C, contact may be up to 5 seconds.
14.4 Package related soldering information
Table 9: Package CPGA, HCPGA DBS, DIP, HDIP, RDBS, SDIP, SIL PMFP [2]
[1] [2]
Suitability of through-hole mount IC packages for dipping and wave soldering methods Soldering method Dipping suitable Wave suitable suitable [1] not suitable
For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. For PMFP packages hot bar soldering or manual soldering is suitable.
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Preliminary data sheet
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15. Revision history
Table 10: Revision history Release date 20060317 Data sheet status Preliminary data sheet Change notice Doc. number Supersedes Document ID TFA9800J_1
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16. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
19. Trademarks
Notice -- All referenced brands, product names, service names and trademarks are the property of their respective owners.
18. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
20. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
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Preliminary data sheet
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2 x 7 W stereo power amplifier
21. Contents
1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 12.1 12.2 12.3 12.4 12.5 12.6 12.7 12.8 12.9 12.10 12.11 13 14 14.1 14.2 14.3 14.4 15 16 17 18 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Application information. . . . . . . . . . . . . . . . . . . 7 Printed-Circuit Board (PCB) layout and grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Input configuration . . . . . . . . . . . . . . . . . . . . . . 7 Built-in protection circuits . . . . . . . . . . . . . . . . . 7 Output power . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Supply voltage ripple rejection . . . . . . . . . . . . . 8 Headroom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin M/SS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switch on and switch off . . . . . . . . . . . . . . . . . . 8 Thermal behavior . . . . . . . . . . . . . . . . . . . . . . . 9 Application diagram and board layout. . . . . . . . 9 Typical performance characteristics for single-ended application . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Introduction to soldering through-hole mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Soldering by dipping or by solder wave . . . . . 14 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 14 Package related soldering information . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information . . . . . . . . . . . . . . . . . . . . 16
(c) Koninklijke Philips Electronics N.V. 2006
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 17 March 2006 Document number: TFA9800J_1
Published in The Netherlands

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